Generate the Programming Files

The technology mapped netlist and packing/placement/routing results produced by VPR contain the information needed to generate a device programming bitstreams. These bitstreams can be used to configure the qlf_k4n8 eFPGA device for validation:

1. Bitstream File

2. FourByte File

Bitstream File

This programming file is the binary bitstream file with extension <top module>.bin. It will be generated by default after the PnR run by Symbiflow.

Four Byte File

This programming file is the 4Byte/hex file with extension <top modudule>.bit. It will be generated by default post PnR run by Symbiflow. This file can be used for validating the designs. To run in the test-bench -mode requires changes. Refer README of the test-bench package.

Note

> The programming files are currently supported only for the device QLF_K4N8